The ADC_3112 is a FMC VITA57.1 module featuring low-power high-density 12-bit/900(1000) Msps ADC capability based on TI latest generation of ADCs, the ADS5409. Thanks to on-board interleaving support and individual clock source programming, two ADC channels can be used on the same input channel, providing an astonishing 12-bit/1800 (2000) Msps sampling rate.
The four (4) analog inputs are implemented through two (2) SSMC high-frequency connectors configurable as DC coupled differential or single-ended. The high-speed (>1GHz) preamplifier stage, based on LT6409 device, supplies analog signals to the ADS5409 devices and to the analog trigger function.
The on-board clock tree is implemented with a high-precision low-jitter low-phase noise clock fully programmable controller LMK04803B. The clock reference source is selectable either from the front panel SSMC CLKREF input, from the on-board ultra-low phase noise XCO/VCXO or from the VITA57.1 “CLK0_C2M” LVDS signal.
To support the dual device interleaving, and to provide double sampling frequency (1800/2000 Msps), a programmable clock delay with sub pico-second resolution is introduced in the ADC clock paths
